This application relates to electronic computing and more particularly to a clock architecture for multi-processor systems.
High performance computer systems may utilize multiple processors to increase processing power. Processing workloads may be divided and distributed among the processors, thereby reducing execution time and increasing performance. One architectural model for high performance multiple processor system is the cache coherent Non-Uniform Memory Access (ccNUMA) model. Under the ccNUMA model, system resources such as processors and random access memory may be segmented into groups referred to as Locality Domains, also referred to as “nodes” or “cells”. Each node may comprise one or more processors and physical memory. A processor in a node may access the memory in its node, referred to as local memory, as well as memory in other nodes, referred to as remote memory.
Multi-processor computer systems may be partitioned into a number of elements, or cells. Each cell includes at least one, and more commonly a plurality, of processors. The various cells in a partitioned computer system may run different operating systems, if desired.
Some multi-processor computer systems rely on a centralized, global system clock to supply clock signals to the various cells. In a centralized, global clock architecture a failure in the global clock can cause a catastrophic failure in the entire computer system.